1. Field of the Invention
This invention relates generally to interfacing electrical components, and, more particularly, to a high-speed clamping circuit.
2. Description of the Related Art
In the field of electronics, information is commonly communicated using digital waveforms, which are ideally represented in FIG. 1 by a waveform that transitions between low and high values without distortion. In the real world, a variety of factors affect and undesirably distort the waveform from the idealized representation of FIG. 1. For example, digital signals communicated over even relatively short transmission lines can be severely impacted by "ringing." Ringing is defined as a damped oscillation occurring in the signal as a result of a sudden change in the signal. Thus, as shown in FIG. 2, transitions in the digital waveform from low-to-high and high-to-low produce a damped oscillation immediately following the transition. In high frequency digital waveforms, the damped oscillation can last for a substantial period of the signal.
These damped oscillations in the waveform are generally undesirable because they reduce the speed of operation of the overall circuit. That is, no assurances can be given as to what the value of the digital signal will be during this damped oscillatory period, owing to the relatively large transitions in the digital waveform. Thus, if the damped oscillations are not removed from the digital waveform, then any circuitry receiving the digital waveform must wait a preselected period of time to ensure that the damped oscillations have died out sufficiently so as not to affect the value of the digital signal observed. This waiting is, of course, undesirable in that it slows the overall operation of the circuit.
Prior art devices have attempted to reduce the damped oscillations by providing a circuit to clamp the transmission line to the desired high and low levels in response to a transition in the input wave form. These circuits have suffered from at least one significant shortcoming. These circuits tend to be slow to operate, and for high frequency digital signals, slow operation of the clamping circuit may allow the most significant portion of the damped oscillation to occur before the clamping circuitry takes effect. The slow response of the clamping circuit increases the time required to stabilize the input waveform and remove the damped oscillations, slowing the operation of the overall circuit.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.